MOSgated devices such as MOSFETs, IGBTs and the like are well known. Vertical conduction MOSgated devices are usually formed in a relatively thick wafer or die, which may have a thickness of several hundred microns. A thin top junction receiving layer which may be only about 3μ thick (for low voltage devices) is located on the top surface of the wafer. Conduction in such devices, when the device is on, is from a source electrode on the top surface to a drain electrode on the bottom surface. The resistance RDSON through the thick wafer substrate adds to the device on resistance.
It is desired to reduce this on resistance RDSON and it is known to thin the wafers to about 60 microns for this purpose. The resulting device is mechanically fragile and hard to handle.
It would be desirable to even more drastically thin the wafer while still providing sufficient mechanical strength so that the wafer and the die singulated therefrom can be easily handled during fabrication and packaging.